diff options
author | Determinant <ted.sybil@gmail.com> | 2017-11-14 23:44:23 -0500 |
---|---|---|
committer | Determinant <ted.sybil@gmail.com> | 2017-11-14 23:44:23 -0500 |
commit | 5f6ef1cc70a4e06bdcab76abfa161b5ec8ca7466 (patch) | |
tree | c7b46c6155849d48fb97e26ec387a9cdc0be1df3 /src/memory.rs | |
parent | f960742a3de3723bb21d2ca0b98a2b3856dbd402 (diff) |
...
Diffstat (limited to 'src/memory.rs')
-rw-r--r-- | src/memory.rs | 75 |
1 files changed, 37 insertions, 38 deletions
diff --git a/src/memory.rs b/src/memory.rs index 6e7cc75..6d83cbc 100644 --- a/src/memory.rs +++ b/src/memory.rs @@ -35,49 +35,48 @@ impl<'a> CPUMemory<'a> { impl<'a> VMem for CPUMemory<'a> { fn read(&self, addr: u16) -> u8 { - match addr { - _ => if addr < 0x2000 { - unsafe{(*self.sram.get())[(addr & 0x07ff) as usize]} - } else if addr < 0x4000 { - let ppu = unsafe {&mut *self.ppu.get()}; - match addr & 0x7 { - 0x2 => ppu.read_status(), - 0x4 => ppu.read_oamdata(), - 0x7 => ppu.read_data(), - _ => 0 - } - } else if addr < 0x6000 { - 0 - } else { - self.mapper.read(addr) + if addr < 0x2000 { + unsafe{(*self.sram.get())[(addr & 0x07ff) as usize]} + } else if addr < 0x4000 { + let ppu = unsafe {&mut *self.ppu.get()}; + match addr & 0x7 { + 0x2 => ppu.read_status(), + 0x4 => ppu.read_oamdata(), + 0x7 => ppu.read_data(), + _ => 0 } + } else if addr < 0x6000 { + 0 + } else { + self.mapper.read(addr) } } + fn write(&self, addr: u16, data: u8) { - let ppu = unsafe {&mut *self.ppu.get()}; - let cpu = unsafe {&mut *self.cpu.get()}; - if addr < 0x2000 { - unsafe{(*self.sram.get())[(addr & 0x07ff) as usize] = data;} - } else if addr < 0x4000 { - match addr & 0x7 { - 0x0 => ppu.write_ctl(data), - 0x1 => ppu.write_mask(data), - 0x3 => ppu.write_oamaddr(data), - 0x4 => ppu.write_oamdata(data), - 0x5 => ppu.write_scroll(data), - 0x6 => ppu.write_addr(data), - 0x7 => ppu.write_data(data), - _ => panic!("invalid ppu reg write access at 0x{:04x}", addr) - } - } else if addr < 0x4020 { - match addr { - 0x4014 => ppu.write_oamdma(data, cpu), - _ => () - } - } else if addr < 0x6000 { - } else { - self.mapper.write(addr, data) + let ppu = unsafe {&mut *self.ppu.get()}; + let cpu = unsafe {&mut *self.cpu.get()}; + if addr < 0x2000 { + unsafe{(*self.sram.get())[(addr & 0x07ff) as usize] = data;} + } else if addr < 0x4000 { + match addr & 0x7 { + 0x0 => ppu.write_ctl(data), + 0x1 => ppu.write_mask(data), + 0x3 => ppu.write_oamaddr(data), + 0x4 => ppu.write_oamdata(data), + 0x5 => ppu.write_scroll(data), + 0x6 => ppu.write_addr(data), + 0x7 => ppu.write_data(data), + _ => panic!("invalid ppu reg write access at 0x{:04x}", addr) + } + } else if addr < 0x4020 { + match addr { + 0x4014 => ppu.write_oamdma(data, cpu), + _ => () } + } else if addr < 0x6000 { + } else { + self.mapper.write(addr, data) + } } } |