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authorDeterminant <[email protected]>2017-11-14 23:44:23 -0500
committerDeterminant <[email protected]>2017-11-14 23:44:23 -0500
commit5f6ef1cc70a4e06bdcab76abfa161b5ec8ca7466 (patch)
treec7b46c6155849d48fb97e26ec387a9cdc0be1df3 /src
parentf960742a3de3723bb21d2ca0b98a2b3856dbd402 (diff)
...
Diffstat (limited to 'src')
-rw-r--r--src/main.rs34
-rw-r--r--src/memory.rs75
2 files changed, 54 insertions, 55 deletions
diff --git a/src/main.rs b/src/main.rs
index 2caa797..2ec5601 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -205,29 +205,29 @@ fn main() {
const CYC_PER_FRAME: u32 = mos6502::CPU_FREQ / 60;
let duration_per_frame: Duration = Duration::from_millis(1000 / 60);
let mut timer = Instant::now();
+ 'main:
loop {
- if cnt >= CYC_PER_FRAME {
- win.render();
- if win.poll() {break}
- let e = timer.elapsed();
- if duration_per_frame > e {
- sleep(duration_per_frame - e);
- println!("faster {}", (duration_per_frame - e).subsec_nanos() as f64 / 1e6);
- } else {
- println!("slower");
- }
- timer = Instant::now();
- cnt -= CYC_PER_FRAME;
- }
cpu.step();
//println!("cpu at 0x{:04x}", cpu.get_pc());
while cpu.cycle > 0 {
- for _ in 0..3 {
- if ppu.tick() {
- cpu.trigger_nmi();
- }
+ if ppu.tick() || ppu.tick() || ppu.tick() {
+ cpu.trigger_nmi();
}
cnt += 1;
+ if cnt >= CYC_PER_FRAME {
+ win.render();
+ if win.poll() {break 'main}
+ let e = timer.elapsed();
+ if duration_per_frame > e {
+ let diff = duration_per_frame - e;
+ sleep(diff);
+ println!("{} faster", diff.subsec_nanos() as f64 / 1e6);
+ } else {
+ println!("{} slower", (e - duration_per_frame).subsec_nanos() as f64 / 1e6);
+ }
+ timer = Instant::now();
+ cnt -= CYC_PER_FRAME;
+ }
cpu.cycle -= 1;
}
}
diff --git a/src/memory.rs b/src/memory.rs
index 6e7cc75..6d83cbc 100644
--- a/src/memory.rs
+++ b/src/memory.rs
@@ -35,49 +35,48 @@ impl<'a> CPUMemory<'a> {
impl<'a> VMem for CPUMemory<'a> {
fn read(&self, addr: u16) -> u8 {
- match addr {
- _ => if addr < 0x2000 {
- unsafe{(*self.sram.get())[(addr & 0x07ff) as usize]}
- } else if addr < 0x4000 {
- let ppu = unsafe {&mut *self.ppu.get()};
- match addr & 0x7 {
- 0x2 => ppu.read_status(),
- 0x4 => ppu.read_oamdata(),
- 0x7 => ppu.read_data(),
- _ => 0
- }
- } else if addr < 0x6000 {
- 0
- } else {
- self.mapper.read(addr)
+ if addr < 0x2000 {
+ unsafe{(*self.sram.get())[(addr & 0x07ff) as usize]}
+ } else if addr < 0x4000 {
+ let ppu = unsafe {&mut *self.ppu.get()};
+ match addr & 0x7 {
+ 0x2 => ppu.read_status(),
+ 0x4 => ppu.read_oamdata(),
+ 0x7 => ppu.read_data(),
+ _ => 0
}
+ } else if addr < 0x6000 {
+ 0
+ } else {
+ self.mapper.read(addr)
}
}
+
fn write(&self, addr: u16, data: u8) {
- let ppu = unsafe {&mut *self.ppu.get()};
- let cpu = unsafe {&mut *self.cpu.get()};
- if addr < 0x2000 {
- unsafe{(*self.sram.get())[(addr & 0x07ff) as usize] = data;}
- } else if addr < 0x4000 {
- match addr & 0x7 {
- 0x0 => ppu.write_ctl(data),
- 0x1 => ppu.write_mask(data),
- 0x3 => ppu.write_oamaddr(data),
- 0x4 => ppu.write_oamdata(data),
- 0x5 => ppu.write_scroll(data),
- 0x6 => ppu.write_addr(data),
- 0x7 => ppu.write_data(data),
- _ => panic!("invalid ppu reg write access at 0x{:04x}", addr)
- }
- } else if addr < 0x4020 {
- match addr {
- 0x4014 => ppu.write_oamdma(data, cpu),
- _ => ()
- }
- } else if addr < 0x6000 {
- } else {
- self.mapper.write(addr, data)
+ let ppu = unsafe {&mut *self.ppu.get()};
+ let cpu = unsafe {&mut *self.cpu.get()};
+ if addr < 0x2000 {
+ unsafe{(*self.sram.get())[(addr & 0x07ff) as usize] = data;}
+ } else if addr < 0x4000 {
+ match addr & 0x7 {
+ 0x0 => ppu.write_ctl(data),
+ 0x1 => ppu.write_mask(data),
+ 0x3 => ppu.write_oamaddr(data),
+ 0x4 => ppu.write_oamdata(data),
+ 0x5 => ppu.write_scroll(data),
+ 0x6 => ppu.write_addr(data),
+ 0x7 => ppu.write_data(data),
+ _ => panic!("invalid ppu reg write access at 0x{:04x}", addr)
+ }
+ } else if addr < 0x4020 {
+ match addr {
+ 0x4014 => ppu.write_oamdma(data, cpu),
+ _ => ()
}
+ } else if addr < 0x6000 {
+ } else {
+ self.mapper.write(addr, data)
+ }
}
}