diff options
Diffstat (limited to 'src/mos6502.rs')
| -rw-r--r-- | src/mos6502.rs | 51 |
1 files changed, 30 insertions, 21 deletions
diff --git a/src/mos6502.rs b/src/mos6502.rs index 59e17de..7b39de4 100644 --- a/src/mos6502.rs +++ b/src/mos6502.rs @@ -1,5 +1,6 @@ #![allow(dead_code)] use memory::VMem; +pub const CPU_FREQ: u32 = 1789773; macro_rules! make_optable { ($x:ident, $t: ty) => (pub const $x: [$t; 0x100] = [ /* 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf */ @@ -690,6 +691,7 @@ pub struct CPU<'a> { macro_rules! make_int { ($f:ident, $v: expr) => ( + #[inline(always)] fn $f(&mut self) { let pc = self.pc; let sp = self.sp; @@ -732,6 +734,7 @@ impl<'a> CPU<'a> { make_int!(irq, IRQ_VECTOR); pub fn step(&mut self) { + //let cycle0 = self.cycle; if self.int.is_some() { match self.int { Some(IntType::NMI) => self.nmi(), @@ -739,30 +742,34 @@ impl<'a> CPU<'a> { _ => () } self.int = None; - return; - } - let pc = self.pc; - let opcode = self.mem.read(pc) as usize; - let len = INST_LENGTH[opcode]; - let mut code = vec![0; len as usize]; - for i in 0..len as u16 { - code[i as usize] = self.mem.read(pc + i); + } else { + let pc = self.pc; + let opcode = self.mem.read(pc) as usize; + /* + let len = INST_LENGTH[opcode]; + let mut code = vec![0; len as usize]; + for i in 0..len as u16 { + code[i as usize] = self.mem.read(pc + i); + } + println!("0x{:04x} {} a:{:02x} x:{:02x} y:{:02x} s: {:02x} sp: {:02x}", + pc, disasm::parse(opcode as u8, &code[1..]), + self.a, self.x, self.y, self.status, self.sp); + */ + /* update opr pointing to operands of current inst */ + self.opr = pc.wrapping_add(1); + /* update program counter pointing to next inst */ + self.pc = pc.wrapping_add(INST_LENGTH[opcode] as u16); + /* get effective address based on addressing mode */ + self.acc = false; + let e = addr::ADDR_MODES[opcode](self) * INST_EXTRA_CYCLE[opcode]; + /* execute the inst */ + ops::OPS[opcode](self); + self.cycle += (INST_CYCLE[opcode] + e) as u32; } - //println!("0x{:04x} {} a:{:02x} x:{:02x} y:{:02x} s: {:02x} sp: {:02x}", - // pc, disasm::parse(opcode as u8, &code[1..]), - // self.a, self.x, self.y, self.status, self.sp); - /* update opr pointing to operands of current inst */ - self.opr = pc.wrapping_add(1); - /* update program counter pointing to next inst */ - self.pc = pc.wrapping_add(INST_LENGTH[opcode] as u16); - /* get effective address based on addressing mode */ - self.acc = false; - let e = addr::ADDR_MODES[opcode](self) * INST_EXTRA_CYCLE[opcode]; - /* execute the inst */ - ops::OPS[opcode](self); - self.cycle += (INST_CYCLE[opcode] + e) as u32; + //(self.cycle - cycle0) as u8 } + #[inline(always)] pub fn get_pc(&self) -> u16 { self.pc } pub fn reset(&mut self) { @@ -773,10 +780,12 @@ impl<'a> CPU<'a> { self.int = None; } + #[inline(always)] pub fn trigger_nmi(&mut self) { self.int = Some(IntType::NMI); } + #[inline(always)] pub fn trigger_irq(&mut self) { if self.get_int() == 0 { self.int = Some(match self.int { |