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authorDeterminant <ted.sybil@gmail.com>2018-01-02 12:09:24 +0800
committerDeterminant <ted.sybil@gmail.com>2018-01-02 12:09:24 +0800
commit3afd5872514945bbec6c0e4656b491b2b21e7651 (patch)
tree1420b98b9d2ca267e67c8135e536bbd8a738f9c6 /src/memory.rs
parent8ec734721562c4b1dc6a4c2dc2ed197b9f6a49d1 (diff)
add first-order filters and quick-fixes to APU
Diffstat (limited to 'src/memory.rs')
-rw-r--r--src/memory.rs8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/memory.rs b/src/memory.rs
index 99a6bae..8954c91 100644
--- a/src/memory.rs
+++ b/src/memory.rs
@@ -45,16 +45,16 @@ impl<'a> CPUBus<'a> {
let cpu = self.get_cpu();
let ppu = self.get_ppu();
let apu = self.get_apu();
- if ppu.tick(self) || ppu.tick(self) || ppu.tick(self) {
- cpu.trigger_nmi()
- }
+ cpu.tick();
if apu.tick(self) {
cpu.trigger_irq()
}
+ if ppu.tick(self) || ppu.tick(self) || ppu.tick(self) {
+ cpu.trigger_nmi()
+ }
if let (true, _) = self.ppu_sampler.borrow_mut().tick() {
ppu.scr.frame()
}
- cpu.tick();
}
}