| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | reg alloc almost done, can pass most of data | Teddy | 2014-05-04 |
| * | resolve interval building issues in loops | Teddy | 2014-05-04 |
| * | ready for reg alloc | Teddy | 2014-05-03 |
| * | long time no commit... major change | Teddy | 2014-05-03 |
| * | ... | Teddy | 2014-05-02 |
| * | ... | Teddy | 2014-05-01 |
| * | can generate native asm | Teddy | 2014-05-01 |
| * | ... | Teddy | 2014-05-01 |
| * | '&' operator | Teddy | 2014-05-01 |
| * | interval merging | Teddy | 2014-04-30 |
| * | bugfix: assign a const | Teddy | 2014-04-30 |
| * | ... | Teddy | 2014-04-30 |
| * | add load inst | Teddy | 2014-04-30 |
| * | renaming now works | Teddy | 2014-04-29 |
| * | dominant frontier | Teddy | 2014-04-29 |
| * | ... | Teddy | 2014-04-29 |
| * | use pointer for operands inside CInst | Teddy | 2014-04-29 |
| * | ssa stage 1 almost done | Teddy | 2014-04-28 |
| * | ... | Teddy | 2014-04-28 |
| * | ... | Teddy | 2014-04-27 |
| * | ... | Teddy | 2014-04-27 |
| * | ssa init | Teddy | 2014-04-27 |