From 42b7d024c3b5e8d76cbf091cec12ee9ab732628a Mon Sep 17 00:00:00 2001
From: Determinant <ted.sybil@gmail.com>
Date: Sat, 11 Nov 2017 00:14:16 -0500
Subject: finish most part of ppu

---
 src/memory.rs | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 src/memory.rs

(limited to 'src/memory.rs')

diff --git a/src/memory.rs b/src/memory.rs
new file mode 100644
index 0000000..386e859
--- /dev/null
+++ b/src/memory.rs
@@ -0,0 +1,39 @@
+pub trait VMem {
+    fn read(&self, addr: u16) -> u8;
+    fn write(&mut self, addr: u16, data: u8);
+}
+
+pub struct CPUMemory {
+    internal: [u8; 2048]
+}
+
+impl CPUMemory {
+    pub fn new() -> Self {
+        CPUMemory{internal: [0; 2048]}
+    }
+}
+
+impl VMem for CPUMemory {
+    fn read(&self, addr: u16) -> u8 {
+        if addr < 0x2000 {
+            self.internal[(addr & 0x07ff) as usize]
+        } else if addr < 0x4000 {
+            match addr & 0x7 {
+                _ => 0
+            }
+        } else {
+            panic!("invalid memory read access at 0x{:04x}", addr)
+        }
+    }
+    fn write(&mut self, addr: u16, data: u8) {
+        if addr < 0x2000 {
+            self.internal[(addr & 0x07ff) as usize] = data;
+        } else if addr < 0x4000 {
+            match addr & 0x7 {
+                _ => ()
+            }
+        } else {
+            panic!("invalid memory write access at 0x{:04x}", addr)
+        }
+    }
+}
-- 
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