From 177667b7034ec09bb0d7146077bb3c0b7ba28336 Mon Sep 17 00:00:00 2001 From: Determinant Date: Wed, 18 Oct 2017 14:35:48 -0400 Subject: code refactoring --- src/main.rs | 172 ++++++++++++++++++++++++++++++++++++++++-------------------- 1 file changed, 116 insertions(+), 56 deletions(-) (limited to 'src/main.rs') diff --git a/src/main.rs b/src/main.rs index d5fdef9..8de0ba5 100644 --- a/src/main.rs +++ b/src/main.rs @@ -1,15 +1,20 @@ #![no_std] +#![feature(asm)] #[macro_use] extern crate stm32f103xx; extern crate cortex_m; -use stm32f103xx::{GPIOA, GPIOB, RCC, SYST, I2C1}; + +use stm32f103xx::{GPIOA, GPIOB, RCC, SYST, I2C1, EXTI, NVIC, Interrupt, AFIO, Peripherals}; +use stm32f103xx::{gpioa}; use cortex_m::peripheral::SystClkSource; + +mod mutex; mod i2c; mod ds3231; mod at24c; struct ShiftRegister<'a> { - gpioa: &'a stm32f103xx::gpioa::RegisterBlock, + gpioa: &'a gpioa::RegisterBlock, width: u8, } @@ -27,6 +32,7 @@ static mut RTC: Option = None; static mut ROM: Option = None; static mut DIGITS: [u8; 6] = [0; 6]; static mut TIME: Clock = Clock{sec: 0, min: 0, hr: 0, reset: 0}; +static mut PERIP: Option = None; fn digits2bcds(digs: &[u8]) -> u32 { let mut res: u32 = 0; @@ -38,7 +44,7 @@ fn digits2bcds(digs: &[u8]) -> u32 { fn digits_countup() { unsafe { - SR.as_mut().unwrap().output_bits(digits2bcds(&DIGITS[..])); + SR.as_ref().unwrap().output_bits(digits2bcds(&DIGITS[..])); let mut i = 0; let mut carry = 1; while carry > 0 && i < DIGITS.len() { @@ -49,23 +55,40 @@ fn digits_countup() { } } +fn refresh_clock() { + unsafe { + SR.as_ref().unwrap().output_bits(digits2bcds(&DIGITS[..])); + } +} + +fn render_clock() { + unsafe { + if bs { + DIGITS[1] = TIME.sec / 10; DIGITS[0] = TIME.sec - DIGITS[1] * 10; + DIGITS[3] = TIME.min / 10; DIGITS[2] = TIME.min - DIGITS[3] * 10; + DIGITS[5] = TIME.hr / 10; DIGITS[4] = TIME.hr - DIGITS[5] * 10; + } else { + for i in &mut DIGITS { + *i = 0xf; + } + } + } +} + fn update_clock() { unsafe { if RTC.is_none() {return} if !TIME.tick() { let ds3231::Date{second: sec, minute: min, - hour: hr, ..} = RTC.as_mut().unwrap() + hour: hr, ..} = RTC.as_ref().unwrap() .read_fulldate(); TIME = Clock{sec, min, hr, reset: RESET_PERIOD}; } - - DIGITS[4] = TIME.sec / 10; DIGITS[5] = TIME.sec - DIGITS[4] * 10; - DIGITS[2] = TIME.min / 10; DIGITS[3] = TIME.min - DIGITS[2] * 10; - DIGITS[0] = TIME.hr / 10; DIGITS[1] = TIME.hr - DIGITS[0] * 10; - SR.as_mut().unwrap().output_bits(digits2bcds(&DIGITS[..])); } + render_clock(); + refresh_clock(); } fn systick_handler() { @@ -73,16 +96,34 @@ fn systick_handler() { update_clock(); } +static mut bs: bool = false; + +fn exti3_handler() { + let p = unsafe {PERIP.as_ref().unwrap()}; + p.EXTI.pr.write(|w| w.pr3().set_bit()); + let x = p.GPIOA.idr.read().idr3().bit(); + unsafe { + if !x && !bs { + bs = true; + } else if x && bs { + bs = false; + } + } + render_clock(); + refresh_clock(); +} + exception!(SYS_TICK, systick_handler); +interrupt!(EXTI3, exti3_handler); impl<'a> ShiftRegister<'a> { - fn new(gpioa: &'a stm32f103xx::gpioa::RegisterBlock, + fn new(gpioa: &'a gpioa::RegisterBlock, width: u8) -> ShiftRegister<'a> { let this = ShiftRegister{gpioa, width}; this } - fn output_bits(&mut self, bits: u32) { + fn output_bits(&self, bits: u32) { let bsrr = &self.gpioa.bsrr; for i in (0..self.width).rev() { bsrr.write(|w| w.br1().reset()); @@ -126,74 +167,93 @@ impl Clock { } } -fn main() { - - let gpioa: &stm32f103xx::gpioa::RegisterBlock = unsafe { &*GPIOA.get() }; - let gpiob: &stm32f103xx::gpioa::RegisterBlock = unsafe { &*GPIOB.get() }; - let rcc: &stm32f103xx::rcc::RegisterBlock = unsafe { &*RCC.get() }; - let i2c: &stm32f103xx::i2c1::RegisterBlock = unsafe { &*I2C1.get() }; - let syst: &cortex_m::peripheral::SYST = unsafe { &*SYST.get() }; +fn init() { + let p = unsafe { + PERIP = Some(Peripherals::all()); + PERIP.as_ref().unwrap() + }; - syst.set_clock_source(SystClkSource::Core); - syst.set_reload(8_000_000); - syst.enable_interrupt(); - syst.enable_counter(); + p.SYST.set_clock_source(SystClkSource::Core); + p.SYST.set_reload(8_000_000); + p.SYST.enable_interrupt(); + p.SYST.enable_counter(); /* enable GPIOA, GPIOB and AFIO */ - rcc.apb2enr.modify(|_, w| w.iopaen().enabled() + p.RCC.apb2enr.modify(|_, w| w.iopaen().enabled() .iopben().enabled() .afioen().enabled()); /* GPIO */ /* enable PA0-2 for manipulating shift register */ - gpioa.crl.modify(|_, w| + p.GPIOA.odr.modify(|_, w| w.odr3().set_bit()); + p.GPIOA.crl.modify(|_, w| w.mode0().output().cnf0().push() .mode1().output().cnf1().push() - .mode2().output().cnf2().push()); + .mode2().output().cnf2().push() + .mode3().input().cnf3().bits(0b10)); /* enable PB6 and PB7 for I2C1 */ - gpiob.crl.modify(|_, w| + p.GPIOB.crl.modify(|_, w| w.mode6().output50().cnf6().alt_open() .mode7().output50().cnf7().alt_open()); /* I2C */ /* enable and reset I2C1 */ - rcc.apb1enr.modify(|_, w| w.i2c1en().enabled()); - rcc.apb1rstr.modify(|_, w| w.i2c1rst().set_bit()); - rcc.apb1rstr.modify(|_, w| w.i2c1rst().clear_bit()); + p.RCC.apb1enr.modify(|_, w| w.i2c1en().enabled()); + p.RCC.apb1rstr.modify(|_, w| w.i2c1rst().set_bit()); + p.RCC.apb1rstr.modify(|_, w| w.i2c1rst().clear_bit()); + + /* NVIC & EXTI */ + p.AFIO.exticr1.write(|w| unsafe { w.exti3().bits(0b0000) }); + p.NVIC.enable(Interrupt::EXTI3); + p.EXTI.imr.write(|w| w.mr3().set_bit()); + p.EXTI.rtsr.write(|w| w.tr3().set_bit()); + p.EXTI.ftsr.write(|w| w.tr3().set_bit()); + unsafe { - I2C = Some(i2c::I2C::new(i2c, rcc)); - let i2c = I2C.as_mut().unwrap(); - let rtc = ds3231::DS3231::new(i2c); + I2C = Some(i2c::I2C::new(p.I2C1)); + let i2c = I2C.as_ref().unwrap(); + RTC = Some(ds3231::DS3231::new(i2c)); ROM = Some(at24c::AT24C::new(i2c)); - SR = Some(ShiftRegister::new(gpioa, 24)); + SR = Some(ShiftRegister::new(p.GPIOA, 24)); - i2c.init(0x01, 400_000, i2c::DutyType::DUTY1, true); + i2c.init(p.RCC, 0x01, 400_000, i2c::DutyType::DUTY1, true); //i2c.init(0x01, 100_000, i2c::DutyType::DUTY1, false); - SR.as_mut().unwrap().output_bits(0); - - /* initialize the ds3231 */ - /* - rtc.write_fulldate(&ds3231::Date{second: 30, - minute: 48, - hour: 21, - day: 4, - date: 21, - month: 9, - year: 17, - am: false, - am_enabled: false}); - */ - /* - let rom = ROM.as_mut().unwrap(); - let mut buf: [u8; 64] = [23; 64]; - rom.write(23, 64, &buf); - let mut buf2: [u8; 80] = [0; 80]; - rom.read(20, 80, &mut buf2); - */ - RTC = Some(rtc); + SR.as_ref().unwrap().output_bits(0); } +} +fn set_clock() { + let rtc = unsafe {RTC.as_ref().unwrap()}; + rtc.write_fulldate(&ds3231::Date{second: 30, + minute: 23, + hour: 18, + day: 2, + date: 10, + month: 10, + year: 17, + am: false, + am_enabled: false}); + /* + let rom = ROM.as_ref().unwrap(); + let mut buf: [u8; 64] = [23; 64]; + rom.write(23, 64, &buf); + let mut buf2: [u8; 80] = [0; 80]; + rom.read(20, 80, &mut buf2); + */ +} + +fn main() { + init(); + //set_clock(); + /* + let x = mutex::Mutex::new(42); + { + let y = x.lock(); + let z = *y + 1; + let w = z; + } + */ update_clock(); } -- cgit v1.2.3-70-g09d2