From b27ebb9f07d7ee0b60abe84738db712c8fbcb3f1 Mon Sep 17 00:00:00 2001 From: Determinant Date: Fri, 29 Sep 2017 01:20:46 -0400 Subject: support arbitrary write for EEPROM --- src/at24c.rs | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'src/at24c.rs') diff --git a/src/at24c.rs b/src/at24c.rs index 534f736..569f04a 100644 --- a/src/at24c.rs +++ b/src/at24c.rs @@ -14,7 +14,9 @@ impl<'a, 'b> AT24C<'a, 'b> { let &AT24C(ref i2c) = self; i2c.conf_ack(true); /* enable ack */ i2c.start(true, true); /* start condition (for writing addr) */ - i2c.send_addr(AT24C_ADDR, TransDir::TRANSMITTER, true); + while !i2c.send_addr(AT24C_ADDR, TransDir::TRANSMITTER, true) { + i2c.start(true, true); + } i2c.send(((start >> 8) & 0x0f) as u8, true); /* first word addr */ i2c.send((start & 0xff) as u8, true); /* second word addr */ i2c.start(true, true); /* restart to read */ @@ -31,7 +33,9 @@ impl<'a, 'b> AT24C<'a, 'b> { let &AT24C(ref i2c) = self; i2c.conf_ack(true); /* enable ack */ i2c.start(true, true); /* start condition (for writing addr) */ - i2c.send_addr(AT24C_ADDR, TransDir::TRANSMITTER, true); + while !i2c.send_addr(AT24C_ADDR, TransDir::TRANSMITTER, true) { + i2c.start(true, true); + } i2c.send(((start >> 8) & 0x0f) as u8, true); /* first word addr */ i2c.send((start & 0xff) as u8, true); /* second word addr */ for i in 0..size { @@ -39,4 +43,24 @@ impl<'a, 'b> AT24C<'a, 'b> { } i2c.stop(true); } + + pub fn write(&self, start: u16, size: usize, buf: &[u8]) { + let end = start + size as u16 - 1; + let pg_s_off = start & 0x1f; + let pg_e_off = end & 0x1f; + let pg_s = start >> 5; + let pg_e = end >> 5; + if pg_s == pg_e { + self.page_write(start, size, buf); + } else { + let mut buf = buf; + self.page_write(start, (0x20 - pg_s_off) as usize, buf); + buf = &buf[0x20 - pg_s_off as usize..]; + for i in (pg_s + 1)..pg_e { + self.page_write(i << 5, 0x20, buf); + buf = &buf[0x20..]; + } + self.page_write(pg_e << 5, (pg_e_off + 1) as usize, buf); + } + } } -- cgit v1.2.3-70-g09d2