diff options
Diffstat (limited to 'circuits/nixie-clock.net')
| -rw-r--r-- | circuits/nixie-clock.net | 618 |
1 files changed, 618 insertions, 0 deletions
diff --git a/circuits/nixie-clock.net b/circuits/nixie-clock.net new file mode 100644 index 0000000..15785f9 --- /dev/null +++ b/circuits/nixie-clock.net @@ -0,0 +1,618 @@ +(export (version D) + (design + (source /home/ymf/work/bluepill/nixie-clock/circuits/nixie-clock.sch) + (date "Sat 28 Oct 2017 12:58:18 PM EDT") + (tool "Eeschema 4.0.7") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title) + (company) + (rev) + (date) + (source nixie-clock.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value ""))))) + (components + (comp (ref U4) + (value 74141) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CE74EA)) + (comp (ref N1) + (value IN-12B) + (footprint nixie:russian-nixies-IN-12) + (libsource (lib nixie-clock-cache) (part IN-12B)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF514A)) + (comp (ref N2) + (value IN-12B) + (footprint nixie:russian-nixies-IN-12) + (libsource (lib nixie-clock-cache) (part IN-12B)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF68BD)) + (comp (ref U5) + (value 74141) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CE726D)) + (comp (ref U1) + (value 74HC595) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib 74xx) (part 74HC595)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CE6DB9)) + (comp (ref U6) + (value 74141) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF7E9B)) + (comp (ref N3) + (value IN-12B) + (footprint nixie:russian-nixies-IN-12) + (libsource (lib nixie-clock-cache) (part IN-12B)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF7EA8)) + (comp (ref N4) + (value IN-12B) + (footprint nixie:russian-nixies-IN-12) + (libsource (lib nixie-clock-cache) (part IN-12B)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF7EB7)) + (comp (ref U7) + (value 74141) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF7ECC)) + (comp (ref U2) + (value 74HC595) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib 74xx) (part 74HC595)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF7ED2)) + (comp (ref U8) + (value 74141) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF8193)) + (comp (ref N5) + (value IN-12B) + (footprint nixie:russian-nixies-IN-12) + (libsource (lib nixie-clock-cache) (part IN-12B)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF81A0)) + (comp (ref N6) + (value IN-12B) + (footprint nixie:russian-nixies-IN-12) + (libsource (lib nixie-clock-cache) (part IN-12B)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF81AF)) + (comp (ref U9) + (value 74141) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF81C2)) + (comp (ref U3) + (value 74HC595) + (footprint Housings_DIP:DIP-16_W7.62mm) + (libsource (lib 74xx) (part 74HC595)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF81C8)) + (comp (ref R1) + (value 47k) + (footprint Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CFA604)) + (comp (ref R2) + (value 47k) + (footprint Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CFB178)) + (comp (ref R3) + (value 47k) + (footprint Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CFB4C3)) + (comp (ref R4) + (value 47k) + (footprint Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CFB616)) + (comp (ref R5) + (value 47k) + (footprint Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CFB757)) + (comp (ref R6) + (value 47k) + (footprint Resistors_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CFB866)) + (comp (ref J1) + (value Conn_01x02) + (footprint Pin_Headers:Pin_Header_Angled_1x02_Pitch2.00mm) + (libsource (lib conn) (part Conn_01x02)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF79F0)) + (comp (ref J2) + (value Conn_01x05) + (footprint Pin_Headers:Pin_Header_Angled_1x05_Pitch2.00mm) + (libsource (lib conn) (part Conn_01x05)) + (sheetpath (names /) (tstamps /)) + (tstamp 59CF8156))) + (libparts + (libpart (lib nixie-clock-cache) (part 74141-RESCUE-nixie-clock) + (fields + (field (name Reference) U) + (field (name Value) 74141-RESCUE-nixie-clock)) + (pins + (pin (num 1) (name ~Q8) (type openCol)) + (pin (num 2) (name ~Q9) (type openCol)) + (pin (num 3) (name A) (type input)) + (pin (num 4) (name D) (type input)) + (pin (num 5) (name VDD) (type power_in)) + (pin (num 6) (name B) (type input)) + (pin (num 7) (name C) (type input)) + (pin (num 8) (name ~Q2) (type openCol)) + (pin (num 9) (name ~Q3) (type openCol)) + (pin (num 10) (name ~Q7) (type openCol)) + (pin (num 11) (name ~Q6) (type openCol)) + (pin (num 12) (name GND) (type power_in)) + (pin (num 13) (name ~Q4) (type openCol)) + (pin (num 14) (name ~Q5) (type openCol)) + (pin (num 15) (name ~Q1) (type openCol)) + (pin (num 16) (name ~Q0) (type openCol)))) + (libpart (lib 74xx) (part 74HC595) + (aliases + (alias 74LS596) + (alias 74LS595)) + (description "8 bits serial in // out Shift Register 3 State Out") + (docs 74xx/74HC595.pdf) + (fields + (field (name Reference) U) + (field (name Value) 74HC595)) + (pins + (pin (num 1) (name QB) (type 3state)) + (pin (num 2) (name QC) (type 3state)) + (pin (num 3) (name QD) (type 3state)) + (pin (num 4) (name QE) (type 3state)) + (pin (num 5) (name QF) (type 3state)) + (pin (num 6) (name QG) (type 3state)) + (pin (num 7) (name QH) (type 3state)) + (pin (num 8) (name GND) (type power_in)) + (pin (num 9) (name ~QH) (type output)) + (pin (num 10) (name SRCLR) (type input)) + (pin (num 11) (name SRCLK) (type input)) + (pin (num 12) (name RCLK) (type input)) + (pin (num 13) (name G) (type input)) + (pin (num 14) (name SER) (type input)) + (pin (num 15) (name QA) (type 3state)) + (pin (num 16) (name VCC) (type power_in)))) + (libpart (lib conn) (part Conn_01x02) + (description "Generic connector, single row, 01x02") + (docs ~) + (footprints + (fp Connector*:*_??x*mm*) + (fp Connector*:*1x??x*mm*) + (fp Pin?Header?Straight?1X*) + (fp Pin?Header?Angled?1X*) + (fp Socket?Strip?Straight?1X*) + (fp Socket?Strip?Angled?1X*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_01x02)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)))) + (libpart (lib conn) (part Conn_01x05) + (description "Generic connector, single row, 01x05") + (docs ~) + (footprints + (fp Connector*:*_??x*mm*) + (fp Connector*:*1x??x*mm*) + (fp Pin?Header?Straight?1X*) + (fp Pin?Header?Angled?1X*) + (fp Socket?Strip?Straight?1X*) + (fp Socket?Strip?Angled?1X*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_01x05)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)) + (pin (num 3) (name Pin_3) (type passive)) + (pin (num 4) (name Pin_4) (type passive)) + (pin (num 5) (name Pin_5) (type passive)))) + (libpart (lib nixie-clock-cache) (part IN-12B) + (fields + (field (name Reference) N) + (field (name Value) IN-12B) + (field (name Footprint) russian-nixies-IN-12)) + (pins + (pin (num 0) (name 0) (type BiDi)) + (pin (num 1) (name 1) (type BiDi)) + (pin (num 2) (name 2) (type BiDi)) + (pin (num 3) (name 3) (type BiDi)) + (pin (num 4) (name 4) (type BiDi)) + (pin (num 5) (name 5) (type BiDi)) + (pin (num 6) (name 6) (type BiDi)) + (pin (num 7) (name 7) (type BiDi)) + (pin (num 8) (name 8) (type BiDi)) + (pin (num 9) (name 9) (type BiDi)) + (pin (num A) (name A) (type BiDi)) + (pin (num LHDP) (name LHDP) (type BiDi)))) + (libpart (lib device) (part R) + (description Resistor) + (footprints + (fp R_*) + (fp R_*)) + (fields + (field (name Reference) R) + (field (name Value) R)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive))))) + (libraries + (library (logical 74xx) + (uri /usr/share/kicad/library/74xx.lib)) + (library (logical device) + (uri /usr/share/kicad/library/device.lib)) + (library (logical conn) + (uri /usr/share/kicad/library/conn.lib)) + (library (logical nixie-clock-cache) + (uri /home/ymf/work/bluepill/nixie-clock/circuits/nixie-clock-cache.lib))) + (nets + (net (code 1) (name "Net-(U1-Pad9)") + (node (ref U1) (pin 9)) + (node (ref U2) (pin 14))) + (net (code 2) (name "Net-(U2-Pad9)") + (node (ref U2) (pin 9)) + (node (ref U3) (pin 14))) + (net (code 3) (name "Net-(U3-Pad7)") + (node (ref U3) (pin 7)) + (node (ref U9) (pin 4))) + (net (code 4) (name "Net-(N6-Pad0)") + (node (ref U9) (pin 16)) + (node (ref N6) (pin 0))) + (net (code 5) (name "Net-(N6-Pad9)") + (node (ref U9) (pin 2)) + (node (ref N6) (pin 9))) + (net (code 6) (name "Net-(N6-Pad8)") + (node (ref U9) (pin 1)) + (node (ref N6) (pin 8))) + (net (code 7) (name "Net-(N6-Pad7)") + (node (ref U9) (pin 10)) + (node (ref N6) (pin 7))) + (net (code 8) (name "Net-(N6-Pad6)") + (node (ref U9) (pin 11)) + (node (ref N6) (pin 6))) + (net (code 9) (name "Net-(N6-Pad5)") + (node (ref U9) (pin 14)) + (node (ref N6) (pin 5))) + (net (code 10) (name "Net-(N6-Pad4)") + (node (ref N6) (pin 4)) + (node (ref U9) (pin 13))) + (net (code 11) (name "Net-(N6-Pad3)") + (node (ref N6) (pin 3)) + (node (ref U9) (pin 9))) + (net (code 12) (name "Net-(N6-Pad2)") + (node (ref U9) (pin 8)) + (node (ref N6) (pin 2))) + (net (code 13) (name "Net-(N6-Pad1)") + (node (ref N6) (pin 1)) + (node (ref U9) (pin 15))) + (net (code 14) (name "Net-(N5-Pad0)") + (node (ref U8) (pin 16)) + (node (ref N5) (pin 0))) + (net (code 15) (name "Net-(N5-Pad9)") + (node (ref U8) (pin 2)) + (node (ref N5) (pin 9))) + (net (code 16) (name "Net-(U3-Pad9)") + (node (ref U3) (pin 9))) + (net (code 17) (name "Net-(N5-Pad8)") + (node (ref N5) (pin 8)) + (node (ref U8) (pin 1))) + (net (code 18) (name "Net-(N5-Pad1)") + (node (ref N5) (pin 1)) + (node (ref U8) (pin 15))) + (net (code 19) (name "Net-(N2-Pad0)") + (node (ref N2) (pin 0)) + (node (ref U5) (pin 16))) + (net (code 20) (name "Net-(N3-Pad8)") + (node (ref N3) (pin 8)) + (node (ref U6) (pin 1))) + (net (code 21) (name "Net-(N3-Pad7)") + (node (ref U6) (pin 10)) + (node (ref N3) (pin 7))) + (net (code 22) (name "Net-(N3-Pad6)") + (node (ref N3) (pin 6)) + (node (ref U6) (pin 11))) + (net (code 23) (name "Net-(N3-Pad5)") + (node (ref N3) (pin 5)) + (node (ref U6) (pin 14))) + (net (code 24) (name "Net-(N3-Pad4)") + (node (ref N3) (pin 4)) + (node (ref U6) (pin 13))) + (net (code 25) (name "Net-(N3-Pad3)") + (node (ref N3) (pin 3)) + (node (ref U6) (pin 9))) + (net (code 26) (name "Net-(N3-Pad2)") + (node (ref U6) (pin 8)) + (node (ref N3) (pin 2))) + (net (code 27) (name "Net-(U2-Pad6)") + (node (ref U2) (pin 6)) + (node (ref U7) (pin 7))) + (net (code 28) (name "Net-(U2-Pad5)") + (node (ref U2) (pin 5)) + (node (ref U7) (pin 6))) + (net (code 29) (name "Net-(U2-Pad4)") + (node (ref U7) (pin 3)) + (node (ref U2) (pin 4))) + (net (code 30) (name "Net-(U2-Pad3)") + (node (ref U2) (pin 3)) + (node (ref U6) (pin 4))) + (net (code 31) (name "Net-(U2-Pad2)") + (node (ref U2) (pin 2)) + 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(node (ref U8) (pin 5)) + (node (ref J2) (pin 5)) + (node (ref U9) (pin 5))) + (net (code 74) (name GND) + (node (ref U8) (pin 12)) + (node (ref U4) (pin 12)) + (node (ref U5) (pin 12)) + (node (ref J1) (pin 2)) + (node (ref U2) (pin 13)) + (node (ref U1) (pin 13)) + (node (ref U9) (pin 12)) + (node (ref U6) (pin 12)) + (node (ref U2) (pin 8)) + (node (ref U3) (pin 8)) + (node (ref U3) (pin 13)) + (node (ref U7) (pin 12)) + (node (ref U1) (pin 8))) + (net (code 75) (name CLK) + (node (ref U3) (pin 12)) + (node (ref U2) (pin 12)) + (node (ref U1) (pin 12)) + (node (ref J2) (pin 3))) + (net (code 76) (name SCLK) + (node (ref U3) (pin 11)) + (node (ref U2) (pin 11)) + (node (ref U1) (pin 11)) + (node (ref J2) (pin 2))) + (net (code 77) (name SER) + (node (ref U1) (pin 14)) + (node (ref J2) (pin 1))) + (net (code 78) (name HV) + (node (ref R3) (pin 1)) + (node (ref R5) (pin 1)) + (node (ref R1) (pin 1)) + (node (ref R6) (pin 1)) + (node (ref R2) (pin 1)) + (node (ref J1) (pin 1)) + (node (ref R4) (pin 1))) + (net (code 79) (name 3v3) + (node (ref U3) (pin 16)) + (node (ref U2) (pin 10)) + (node (ref U3) (pin 10)) + (node (ref U2) (pin 16)) + (node (ref U1) (pin 10)) + (node (ref J2) (pin 4)) + (node (ref U1) (pin 16))) + (net (code 80) (name "Net-(N6-PadA)") + (node (ref N6) (pin A)) + (node (ref R6) (pin 2))) + (net (code 81) (name "Net-(N6-PadLHDP)") + (node (ref N6) (pin LHDP))) + (net (code 82) (name "Net-(N5-PadLHDP)") + (node (ref N5) (pin LHDP))) + (net (code 83) (name "Net-(N4-PadLHDP)") + (node (ref N4) (pin LHDP))) + (net (code 84) (name "Net-(N3-PadLHDP)") + (node (ref N3) (pin LHDP))) + (net (code 85) (name "Net-(N2-PadLHDP)") + (node (ref N2) (pin LHDP))) + (net (code 86) (name "Net-(N1-PadLHDP)") + (node (ref N1) (pin LHDP))) + (net (code 87) (name "Net-(N5-PadA)") + (node (ref N5) (pin A)) + (node (ref R5) (pin 2))) + (net (code 88) (name "Net-(N3-PadA)") + (node (ref N3) (pin A)) + (node (ref R3) (pin 2))) + (net (code 89) (name "Net-(N4-PadA)") + (node (ref N4) (pin A)) + (node (ref R4) (pin 2))) + (net (code 90) (name "Net-(N2-PadA)") + (node (ref R2) (pin 2)) + (node (ref N2) (pin A))) + (net (code 91) (name "Net-(N1-PadA)") + (node (ref N1) (pin A)) + (node (ref R1) (pin 2))) + (net (code 92) (name "Net-(N1-Pad5)") + (node (ref U4) (pin 14)) + (node (ref N1) (pin 5))) + (net (code 93) (name "Net-(N1-Pad4)") + (node (ref N1) (pin 4)) + (node (ref U4) (pin 13))) + (net (code 94) (name "Net-(N1-Pad6)") + (node (ref U4) (pin 11)) + (node (ref N1) (pin 6))) + (net (code 95) (name "Net-(N1-Pad7)") + (node (ref U4) (pin 10)) + (node (ref N1) (pin 7))) + (net (code 96) (name "Net-(N1-Pad3)") + (node (ref N1) (pin 3)) + (node (ref U4) (pin 9))) + (net (code 97) (name "Net-(N1-Pad2)") + (node (ref N1) (pin 2)) + (node (ref U4) (pin 8))) + (net (code 98) (name "Net-(U1-Pad3)") + (node (ref U1) (pin 3)) + (node (ref U4) (pin 4))) + (net (code 99) (name "Net-(U1-Pad15)") + (node (ref U4) (pin 3)) + (node (ref U1) (pin 15))) + (net (code 100) (name "Net-(N1-Pad9)") + (node (ref N1) (pin 9)) + (node (ref U4) (pin 2))) + (net (code 101) (name "Net-(N1-Pad8)") + (node (ref N1) (pin 8)) + (node (ref U4) (pin 1))) + (net (code 102) (name "Net-(U1-Pad2)") + (node (ref U1) (pin 2)) + (node (ref U4) (pin 7))) + (net (code 103) (name "Net-(U1-Pad1)") + (node (ref U4) (pin 6)) + (node (ref U1) (pin 1))) + (net (code 104) (name "Net-(U1-Pad6)") + (node (ref U5) (pin 7)) + (node (ref U1) (pin 6))) + (net (code 105) (name "Net-(U1-Pad5)") + (node (ref U5) (pin 6)) + (node (ref U1) (pin 5))) + (net (code 106) (name "Net-(U1-Pad4)") + (node (ref U5) (pin 3)) + (node (ref U1) (pin 4)))))
\ No newline at end of file |